An Efficient Artificial Bee Colony Algorithm and Analog Circuit Design Environment

The artificial bee colony algorithm (ABC), a population based algorithm, provides solutions with better accuracy compared to other competitive population based algorithms. However, it suffers from slow convergence speed. We suggest modifications in search strategy of ABC to improve overall performance and named this modified algorithm, Efficient ABC algorithm (EABC). The performance of EABC is compared with ABC by conducting experiment on 15 well-known scalable benchmark functions and synthesizing two analog circuits, two stage opamp and bulk driven OTA, in 130μm CMOS technology. The proposed algorithm is performing significantly better than ABC for 14 benchmark functions and for remaining one the results are comparable. With the two-stage op-amp design problem, the average design error is 0.4% with EABC compared to 2.10% with ABC. Not only that the average design time is only 19.8 minutes with EABC in contrast to 22 minutes with ABC. In case of bulk driven OTA design, the average design error with EABC algorithm is zero compared to 1.26% with ABC. The average design time taken to design bulk driven OTA by EABC is only 4.62 minutes compared to 9.07 minutes with ABC. Apart from this, EABC is also compared with GABC and MABC algorithms, the variants of ABC. This comparison clearly indicates that EABC is performing better than ABC, GABC and MABC. Key–Words: Artificial bee colony, Optimization, Automatic circuit design, Operational Amplifier, OTA